ARM cpus have the interrupt vector at address 0x000000000 ( IRQ table at 0x00000018), and on many phones, (except for the ones using L4), BREW runs privileged My question is, on MSM 6500 chips, what IRQ does the timer chip generate on? Also, what GPIO port controls the timer chip?

I understand that these are questions are non-brew specific, but they can be done from BREW and they are Qualcomm specific.

Thanks